Method of fabricating conductive lines with silicide layer

Details Method of fabricating conductive lines with silicide layer Method of fabricating conductive lines with silicide layer

2005-08-29

2009-06-23

Blum, David S (Department: 2813)

Semiconductor device manufacturing: process

Forming schottky junction

Using platinum group metal

C438S583000, C438S630000, C438S649000, C438S651000, C438S655000, C438S664000, C438S682000, C438S721000, C438S755000

Reexamination Certificate

active

07550372

ABSTRACT:
A method of fabricating conductive lines is described. A substrate having a polysilicon layer thereon is provided. A mask layer having an opening that exposes the polysilicon layer is formed on the polysilicon layer. Then, spacers are formed on the sidewalls of the mask layer. Using the mask layer and the spacers as a mask, a portion of the polysilicon layer is removed until the substrate is exposed. After that, an insulating layer that completely fills the opening is formed over the substrate. The insulating layer has an etching selectivity different from the mask layer. Thereafter, the mask layer is removed to expose the polysilicon layer and then a metal silicide layer is formed on the upper surface of the polysilicon layer.

REFERENCES:
patent: 6518206 (2003-02-01), Kumar et al.
patent: 6955961 (2005-10-01), Chung
patent: 7169660 (2007-01-01), Lojek
patent: 2005/0136675 (2005-06-01), Sandhu et al.
patent: 2005/0145928 (2005-07-01), Ogura et al.
patent: 2005/0179098 (2005-08-01), Chan et al.

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