Method of fabricating chips and an associated support

Semiconductor device manufacturing: process – Semiconductor substrate dicing

Reexamination Certificate

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Details

C438S462000

Reexamination Certificate

active

07544586

ABSTRACT:
A method of fabricating a plurality of chips, with each chip including at least one circuit. This method includes the successive steps of creating chips on a layer of semiconductor material that is integral with a substrate; forming a weakening pattern corresponding to a predetermined cutting pattern on a support; transferring the chip-containing layer from the substrate to the support; and forming individual chips by cutting the chip-containing layer in accordance with the predetermined cutting pattern. Also, an assembly for fabricating a plurality of chips, each chip including at least one circuit provided on a layer of semiconductor material that is carried by a support that includes a weakening pattern corresponding to a predetermined cutting pattern for forming individual chips, with the support being obtained by assembling a plurality of individual tiles with boundaries between the individual tiles corresponding to the weakening pattern. The tiles may be assembled by disposing a binder between the individual tiles, with the binder ensuring temporary bonding of the tiles.

REFERENCES:
patent: 5393706 (1995-02-01), Mignardi et al.
patent: 5527744 (1996-06-01), Mignardi et al.
patent: 5904548 (1999-05-01), Orcutt
patent: 6933212 (2005-08-01), Lee et al.
patent: 7452739 (2008-11-01), Chu et al.
patent: 2001/0048014 (2001-12-01), Ichikawa et al.
patent: 2008/0265376 (2008-10-01), Tsurume et al.
patent: 0 610 657 (1994-08-01), None
patent: 1 160 853 (2001-12-01), None
patent: 58048172 (1983-03-01), None
patent: 59172740 (1984-09-01), None
patent: 60108745 (1985-05-01), None
patent: 61267342 (1986-11-01), None

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