Method of fabricating and contacting ultra-small three terminal

Details Method of fabricating and contacting ultra-small three terminal Method of fabricating and contacting ultra-small three terminal

1996-03-01

1997-05-13

Chaudhari, Chandra

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

Fluid growth step with preceding and subsequent diverse...

438494, 438979, H01L 4900

Patent

active

056292155

ABSTRACT:
Ultra-small three terminal semiconductor devices and a method of fabrication including patterning the planar surface of a substrate and a control layer to form a first and second pattern edge and consecutively forming a plurality of layers of semiconductor material in overlying relationship to the pattern edges so that a discontinuity is produced in the layers and a first layer on one side of the pattern edge is aligned with and in electrical contact with a different layer on the other side of the pattern edge.

REFERENCES:
patent: 4914045 (1990-04-01), Webb et al.
patent: 5155050 (1992-10-01), Bayraktaroglu
patent: 5445985 (1995-08-01), Calviello et al.
patent: 5496755 (1996-03-01), Bayraktaroglu

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