Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2006-10-10
2006-10-10
Baumeister, B. William (Department: 2891)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S359000, C438S318000, C438S320000, C438S357000, C438S341000, C438S366000, C257SE21371, C257SE21335, C257SE21703
Reexamination Certificate
active
07118981
ABSTRACT:
In a method of fabricating an integrated silicon-germanium heterobipolar transistor a silicon dioxide layer arranged between a silicon-germanium base layer and a silicon emitter layer is formed by means of Rapid Thermal Processing (RTP) to ensure enhanced component properties of the integrated silicon-germanium heterobipolar transistor.
REFERENCES:
patent: 4672413 (1987-06-01), Gardner
patent: 5089428 (1992-02-01), Verret et al.
patent: 5296388 (1994-03-01), Kameyama et al.
patent: 5616515 (1997-04-01), Okuno
patent: 6080631 (2000-06-01), Kitahata
patent: 6365479 (2002-04-01), U'Ren
patent: 6410395 (2002-06-01), Terpstra et al.
patent: 6459104 (2002-10-01), Schuegraf
patent: 6509242 (2003-01-01), Frei et al.
patent: 6638819 (2003-10-01), Joshi et al.
patent: 6709941 (2004-03-01), Fujimaki
patent: 6787879 (2004-09-01), Joshi et al.
patent: 690 22 692 (1996-03-01), None
patent: 197 52 052 (1998-08-01), None
patent: 881669 (1998-12-01), None
patent: WO 02/41361 (2002-05-01), None
patent: WO 2005088721 (2005-09-01), None
Balster Scott
El-Kareh Badih
Haeusler Alfred
Steinmann Philipp
Anya Igwe U.
Baumeister B. William
Brady III W. James
Garner Jacqueline J.
LandOfFree
Method of fabricating an integrated silicon-germanium... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating an integrated silicon-germanium..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating an integrated silicon-germanium... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3675943