Method of fabricating a vertical bipolar transistor with a...

Details Method of fabricating a vertical bipolar transistor with a... Method of fabricating a vertical bipolar transistor with a...

2006-07-20

2009-02-03

Choi, Jacob Y. (Department: 4172)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

C438S311000, C438S312000, C438S313000, C438S342000

Reexamination Certificate

active

07485537

ABSTRACT:
The present invention provides a a method of fabricating bipolar junction transistors (BJTs) on selected areas of a very thin buried oxide (BOX) using a conventional silicon-on-insulator (SOI) starting wafer with a thick BOX. The reduced BOX thickness underneath the bipolar devices allows for a significantly reduced substrate bias compatible with the CMOS to be applied while maintaining the advantages of a thick BOX underneath the CMOS.

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Jin Cai et al., “Vertical SiGe-Base Bipolar Transistors on CMOS-Compatible SOI Substrate.” May 22, 2008.

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