Method of fabricating a top-gate type thin film transistor with

Details Method of fabricating a top-gate type thin film transistor with Method of fabricating a top-gate type thin film transistor with

1998-11-06

2000-07-11

Wilczewski, M

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438475, H01L 21336

Patent

active

060872063

ABSTRACT:
In a top-gate type thin film transistor including a polycrystalline silicon pattern having a channel region, a source region and a drain region on a substrate, a gate electrode via a gate insulating layer on the polycrystalline silicon layer, an insulating layer thereon, and metal electrodes coupled to the source region and the drain region, dangling bonds of silicon of the channel region at an interface with the gate insulating layer and dangling bonds of silicon of a part of the drain region are combined with hydrogen.

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I-Wei Wu, et al., "Effects of Trap-State Density Reduction by Plasma Hydrogenation in Low-Temperature Polysilicon TFT", IEEE Electron Device Letters, vol. 10, No. 3, Mar. 1989, pp. 123-125.
I-Wei Wu, et al., "Performance of Polysilicon TFT Digital Circuits Fabricated with Various Processing Techniques and Device Architectures", SID 90 Digest, 1990, pp. 307-310.

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