Method of fabricating a thin film transistor

Details Method of fabricating a thin film transistor Method of fabricating a thin film transistor

2008-03-11

2008-03-11

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S149000, C257SE21457

Reexamination Certificate

active

07341899

ABSTRACT:
A method of fabricating a thin film transistor is disclosed. The method comprises forming an amorphous silicon layer overlying a substrate. A first heat treatment is then performed to reduce the hydrogen atom concentration of the amorphous silicon layer. Next, the amorphous silicon layer is patterned to form an island-shaped amorphous silicon pattern. An insulating layer is then formed over the island-shaped amorphous silicon pattern followed by forming a gate electrode on the insulating layer. Ions are then implanted into the island-shaped amorphous silicon pattern to form an ion doped region. A heat treatment is then performed to transfer the island-shaped amorphous silicon pattern into an island-shaped polysilicon pattern and simultaneously activate the ion doped region using laser annealing. A passivation layer is formed on the island-shaped polysilicon pattern followed by etching the passivation layer to form openings exposing the ion doped area.

REFERENCES:
patent: 4463492 (1984-08-01), Maeguchi
patent: 6174757 (2001-01-01), Yamaguchi et al.
patent: 6660574 (2003-12-01), Yamazaki
patent: 2002/0115241 (2002-08-01), Ando et al.
patent: 2004/0023446 (2004-02-01), Fujimura

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