Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1998-07-07
2000-05-16
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438164, H01L 2184
Patent
active
06063653&
ABSTRACT:
The present invention includes patterning a metal layer on a glass substrate. A dielectric layer is formed on the metal layer. An amorphous silicon layer is subsequently formed on the dielectric layer. A first positive photoresist is formed on the amorphous silicon layer. Then, a back-side exposure is used by using the gate electrodes as a mask. A bake step is performed to expand the lower portion of the photoresist. Next, a second positive photoresist layer is formed on the amorphous silicon layer and the residual first positive photoresist layer. A further back-side exposure is employed again from the back side of the substrate using the gate electrode as the mask. A second back step is applied to expand the lower portion of the second positive photoresist layer. An ion implantation is performed by using the second positive photoresist as a mask. Next, the substrate is then annealed. Amorphous silicon layer is then patterned. A further dielectric layer for isolation is formed on the patterned amorphous silicon layer. Source and drain are patterned on the dielectric layer to contact with the amorphous silicon layer. Subsequently, a passivation layer is deposited on the source and drain.
REFERENCES:
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patent: 5166086 (1992-11-01), Takeda et al.
patent: 5429962 (1995-07-01), Yang
patent: 5610082 (1997-03-01), Oh
patent: 5834797 (1998-11-01), Yamanaka
Lin Gwo-Long
Lin Kang-Cheng
Duy Mai Anh
Industrial Technology Research Institute
Monin, Jr. Donald L.
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