Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-05-16
2003-01-28
Ho, Hoai (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S306000, C438S255000, C438S398000, C438S665000, C438S964000
Reexamination Certificate
active
06512261
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor memory and a method of producing the same, wherein the semiconductor memory has a storage node that constitutes a capacitor together with a cell plate, and that consists of a capacitor electrode film having a rugged surface, for improving the capacitance of the capacitor.
Of recent years, as portable equipment such as cellular phones and notebook computers becomes smaller and lighter, various semiconductor memories that are built in the equipment are desired to have fine structure and large-scale integration. In particular, DRAM (Dynamic Random Access Memory) is representative one of such memories, and for their fine structure and large-scale integration, it is necessary to compress their memory cell structure and reduce the area per bit occupied by memory cells. On the other hand, it is required to keep the capacitance of the capacitors more than a predetermined value to store information on each memory cell. Recently, as a technology for coping with this problem, rugged surface processing that roughens the surface of the storage node to enlarge the surface area, which constitutes the capacitor with a cell plate through a dielectric film, has been often used.
As a method of producing DRAM having a storage node that consists of a capacitor electrode film having a rugged surface, it is known, for example, to remove part of the capacitor electrode film by etching, after rugged surface processing, to isolate and insulate the capacitor electrode film. In such a method, part of the capacitor electrode film to be removed sometimes remains in etching, since the thickness of the capacitor electrode after rugged surface processing is not uniform. In some cases, the remnants of the capacitor electrode film cause a shortcut between the storage node and cell plate to produce a bit defect of the memory.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a semiconductor memory having a memory cell structure and a method of producing the same such that part of the capacitor electrode film therein is securely removed to reduce the percentage of defective memories.
In an aspect of the present invention, there is provided a method of producing a semiconductor memory having a memory cell structure in which a storage node, which consists of a capacitor electrode film having a rugged surface formed inside holes of an interlayer insulating film that is deposited on a substrate, constitutes a capacitor together with a cell plate through a dielectric film, the method comprising steps of; forming holes in the interlayer insulating film in the direction of its thickness, forming the capacitor electrode inside the holes and over the upper surface of the interlayer insulating film, removing the capacitor electrode film exposed to the upper surface of the interlayer insulating film, making the surface of the capacitor electrode film formed inside the holes a rugged surface, and forming a cell plate inside the holes and on the upper surface of the interlayer insulating film, wherein the step of removing the capacitor electrode film exposed to the upper surface of the interlayer insulating film is performed before the step of making the surface of the capacitor electrode film formed inside the holes a rugged surface. The method may further comprise a step of forming a protecting layer having a predetermined or more amount of moisture resistance over the whole upper surface of the interlayer insulating film, before the step of forming the holes in the interlayer insulating film. A layer consisting of SiN may be used for the protecting layer. The cell plate and protecting layer that are formed over the circuits in the peripheral area of the memory cell structure may be simultaneously removed after the step of forming the cell plate.
In an another aspect of the present invention, there is provided a method of producing a semiconductor memory having a memory cell structure in which a storage node, which consists of a capacitor electrode film having a rugged surface formed inside holes of an interlayer insulating film that is deposited on a substrate, constitutes a capacitor together with a cell plate through a dielectric film, the method comprises steps of; forming a protecting layer having a predetermined or more amount of moisture resistance over the interlayer insulating film, forming holes in the interlayer insulating film in the direction of its thickness, forming the capacitor electrode film inside the holes and over the upper surface of the protecting layer formed over the interlayer insulating film, making the surface of the capacitor electrode film formed inside the holes a rugged surface, a step of removing the rugged capacitor electrode film exposed to the upper surface of the interlayer insulating film, and forming a cell plate inside the holes and on the upper surface of the interlayer insulating film, wherein the step of removing the capacitor electrode film exposed to the upper surface of the interlayer insulating film is performed before the step of making the surface of the capacitor electrode film formed inside the holes a rugged surface.
In a further another aspect of the present invention, there is provided a semiconductor memory having a memory cell structure in which a storage node, which consists of a capacitor electrode film having a rugged surface formed inside holes of an interlayer insulating film that is deposited on a substrate, constitutes a capacitor together with a cell plate through a dielectric film, wherein a protecting layer having a predetermined or more amount of moisture resistance is formed over the upper surface of the interlayer insulating film.
REFERENCES:
patent: 4375125 (1983-03-01), Byatt
patent: 5696017 (1997-12-01), Ueno
patent: 5936296 (1999-08-01), Park et al.
patent: 6010931 (2000-01-01), Sun et al.
patent: 6188097 (2001-02-01), Derderian et al.
patent: 6228702 (2001-05-01), Hirota
Ho Hoai
Ho Tu-Tu
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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