Method of fabricating a semiconductor device

Details Method of fabricating a semiconductor device Method of fabricating a semiconductor device

2006-08-15

2006-08-15

Coleman, W. David (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S595000, C438S596000

Reexamination Certificate

active

07091117

ABSTRACT:
A method of fabricating a semiconductor device including sequentially forming a polysilicon layer, a first insulating layer, and a photoresist layer over a gate oxide film positioned on a semiconductor substrate. A photoresist pattern with a first groove is formed by selectively patterning the photoresist layer to partially expose a surface of the first insulating layer. A second insulating layer is formed over the photoresist pattern with the first groove and over the exposed surface of the first insulating layer. A sacrificial spacer is formed on each inner wall of the first groove by etching back the second insulating layer and forming a second groove in the first insulating layer in communication with the first groove to expose a surface of the polysilicon layer at the bottom of the second groove. The photoresist pattern is removed, and an arbitrary layer pattern is formed over the polysilicon layer at the bottom of the second groove. The sacrificial spacers and first insulating layer are removed, and a gate electrode is formed by etching the polysilicon layer using the arbitrary layer pattern as a mask.

REFERENCES:
patent: 6270929 (2001-08-01), Lyons et al.
patent: 6930028 (2005-08-01), Hanratty et al.
patent: 2003/0006410 (2003-01-01), Doyle
patent: 00315661 (2001-11-01), None
Manufacture for Semiconductor Device, Yoshimune Hiroyasu, Japan Patent JP2000315661, Publication Date Nov. 14, 2000.
English Abstract.

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