Method of fabricating a semiconductor device

Details Method of fabricating a semiconductor device Method of fabricating a semiconductor device

2002-01-29

2003-08-26

Goudreau, George (Department: 1763)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S694000, C438S627000, C438S629000, C204S192120, C204S192170, C204S298060, C204S298110

Reexamination Certificate

active

06610597

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to the manufacture of semiconductor devices, and more particularly to manufacture of contacts and/or vias that include conductive plugs.
BACKGROUND OF THE INVENTION
Continuing advances in semiconductor manufacturing processes have resulted in semiconductor devices with finer features and/or higher degrees of integration. Among the various features that may be included within a semiconductor device are contact structures (including “vias”) that typically provide an electrical connection between circuit devices and/or layers. The above-mentioned advances have led to contact structures with smaller sizes and/or higher aspect ratios. A contact aspect ratio may be the ratio between a contact depth and width.
A typical contact structure may include forming a contact hole in an insulating layer and then filling such a contact hole. Contact structures with smaller contact sizes and/or higher aspect ratios can be more difficult to fill than larger contacts and/or contacts with lower aspect ratios. Consequently, a contact filling material is often selected for its ability to adequately fill a contact hole.
Two common conductive materials that may be included in a semiconductor manufacturing process are aluminum and copper. Such materials have been included in interconnect patterns and the like. However, it has been difficult to form small and/or high aspect ratio contacts with aluminum. Similarly, while can copper provides advantageously low resistance, it is believed that many technical problems may have to be overcome before copper contact structures may be practically implemented. In view of the above drawbacks to materials such as aluminum and copper, many conventional contact forming methods include tungsten as a contact filling material.
One method of forming contact structures with tungsten includes a selective tungsten chemical vapor deposition (W-CVD) method. In a selective W-CVD method, tungsten may be deposited essentially only on silicon exposed at the bottom of a contact hole. It is believed that current conventional selective W-CVD methods are not sufficiently reproducible to provide satisfactory results in a manufacturing process. Further, adverse results may result when selective W-CVD methods are used to fill contacts having depths that vary. More particularly, a contact hole that is shallow with respect to the other contact holes may suffer from excessive growth (overgrowth) of tungsten in the contact hole. Overgrowth of tungsten may then be corrected with an etch back step that removes only overgrown portions. However, such an etch back step can add to the complexity and/or cost of a manufacturing process.
In light of the drawbacks present in selective W-CVD approaches, conventional “blanket” W-CVD methods are widely used for filling contact holes. In a blanket W-CVD method, contact holes may be formed in an insulating layer. Tungsten may then be deposited over the surface of the insulating layer, filling the contact holes. Deposited tungsten may then be etched back to remove tungsten from the top surface of the insulating layer while tungsten within the contact holes remains. Tungsten remaining within a contact hole is often referred to as a tungsten “plug.”
A conventional method for forming a tungsten plug in a contact with a blanket W-CVD method will now be described with reference to
FIGS. 3A-3D
and
4
A-
4
B.
In a conventional contact formation process, an interlayer insulating film
002
may be formed on a silicon substrate
001
that includes an impurity diffusion region
011
. An interlayer insulating film
002
may include silicon dioxide (SiO
2
), for example. A contact hole
020
may then be formed through the interlayer insulating film
002
to the impurity diffusion region
011
. A structure following the formation of such a contact hole
020
is shown in FIG.
3
A.
Referring now to
FIG. 3B
, a titanium film
003
may be deposited on the surface of the interlayer insulating film
002
, including within the contact hole
020
. A titanium film
003
may be deposited with a conventional sputtering method, and to a thickness in the range of about 20 nm to 50 nm. A conventional sputtering method may be isotropic. A titanium film
003
may serve as a barrier layer for subsequent contact materials, preventing such materials from diffusing into a semiconductor substrate
001
.
Referring now to
FIG. 3C
, following the deposition of a titanium film
003
, a titanium nitride film
004
may be deposited on the exposed surface, including within the contact hole
020
. A titanium nitride film
004
may be deposited with a reactive sputtering method, and to a thickness in the range of about 20 nm to 50 nm. In such a reactive sputtering method, a titanium target may be a source of titanium. Titanium particles from a target may react with nitrogen before reaching a device surface thereby providing titanium nitride as a sputtered material.
A layered film of titanium/titanium nitride (
003
/
004
) may serve as an adhesion layer for a subsequently deposited material, such as tungsten. Following the deposition of a layered titanium/titanium nitride film (
003
/
004
), a temperature cycling step may be used to further improve the adhering characteristics of such a layered film. As but one example, a ramp anneal may be performed at 650° C. for 30 seconds. Such a ramp anneal may result in a reaction between the film materials, as well as a reaction between a titanium film
003
and an interlayer insulating film
002
that furthers the adhering characteristics of the layered film.
Referring now to
FIG. 3D
, a layer of tungsten
005
may then be deposited over a layered of film of titanium/titanium nitride (
003
/
004
). A tungsten deposition step may include a source gas that, includes tungsten, such as tungsten hexafluoride (WF
6
), as but one example. Such a deposition step may form a layer of tungsten
005
over a layered of film of titanium/titanium nitride (
003
/
004
), thereby filling a contact hole
020
.
An etch back step may then be performed that removes portions of tungsten on the interlayer insulating film
002
while leaving tungsten within a contact hole
020
, thereby forming a tungsten plug. Such a tungsten etch back step may include a fluorine containing gas. For example, tungsten may be plasma etched with sulfur hexafluoride (SF
6
) as a source gas.
Following the etch back of tungsten, exposed portions of the layered titanium/titanium nitride (
003
/
004
) film may be removed with a chlorine containing gas. A contact structure following such a step is shown in FIG.
4
A. The result may be a contact structure with a tungsten plug.
Following the formation of a tungsten plug, an interconnect film may be formed over a semiconductor substrate
001
, including over a tungsten plug. An interconnect film may include aluminum, as but one example. Such an interconnect film may then be patterned to form an interconnect structure
006
. A semiconductor device following the formation of an interconnect structure
006
is shown in FIG.
4
B.
In this way, a conventional W-CVD process may be used to form a tungsten plug that connects and interconnect structure
006
to a semiconductor substrate
001
.
A drawback to a conventional approach, such as that shown in
FIGS. 3A-3D
and
4
A-
4
B, can be a resulting shape of a tungsten plug. More particularly, as shown in
FIG. 4A
, an upper portion tungsten
005
formed within a contact hole
020
may have a recess. Such a recess may be formed when a tungsten film
005
and/or layered titanium/titanium nitride film (
003
/
004
) is etched back. More particularly, such layers may essentially be overetched to help ensure that residual tungsten, titanium and/or titanium nitride is not left on a surface of interlayer insulating film
002
. Such an overetching can remove an upper portion of tungsten
005
that is within a contact hole
020
.
A recess in an upper portion of a tungsten plug (i.e., increased “plug loss”), can result in worse step coverage for an overlying intercon

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