Method of fabricating a semiconductor device

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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Reexamination Certificate

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06274466

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a fabrication method for integrated circuits. More particularly, the present invention relates to a method of fabricating a semiconductor device.
2. Description of the Related Art
Progress in semiconductor fabrication technologies has made it possible to fabricate semiconductor devices at the deep sub-micron level. As the sizes of devices decreases, it is necessary to control effectively a junction depth and a channel depth, in order to obtain a decreased threshold voltage and to prevent a short channel effect.
Of the many currently used P-type dopants, boron atoms (B) are most widely used. However, the boron atoms have a high diffusion coefficient. Thus, it is difficult to form a high-quality shallow junction by implanting the boron atoms. In order to control the junction depth and the channel depth, dopants having properties such as a high atomic mass, a low diffusion coefficient and a sufficient solubility in silicon are implanted. In the group-III elements, indium (In) atoms have a high atomic mass and a low diffusion coefficient, which is about 5 to 10 times lower than that of the boron atoms. Hence, implanting indium atoms as the P-type dopant has become popular.
However, indium atoms have a high energy gap, which is usually above 0.16 KeV. Additionally, the radius of an indium atom is larger than the radius of a silicon atom. Therefore, the indium atoms easily gather to form clusters due to the tendency to reduce the stress between the indium atoms and silicon substrate. If the indium atoms form clusters, the indium atoms cannot effectively serve as acceptors. Thus, the effective concentration of the implanted indium atoms cannot be increased as the implantation dosage increases during ion implantation. Actually, the effective concentration of the implanted indium atoms gradually approaches a concentration saturation point. The foregoing effect is called a freeze-out effect, which can be observed after performing ion implantation and annealing. Reference is made to
FIG. 1
, which shows the freeze-out effect observed by a graph showing the relationship between a dosage and a sheet conductance illustrated after performing ion implantation and annealing. The horizontal axis represents dosage, measured in 1/cm
2
. The vertical axis is sheet conductance, measured as a square unit/K ohm.
SUMMARY OF THE INVENTION
The invention provides a method of fabricating a semiconductor device. A first dopant and a second dopant are in-situ implanted in a substrate. The first dopant has a higher energy gap, a higher atomic mass, and a lower diffusion coefficient than those of the second dopant.
The invention also provides a method of fabricating a doped region of a semiconductor device. A first dopant and a second dopant are in-situ implanted into a substrate. A thermal step is performed to form a doped region comprising the first dopant and the second dopant in the substrate. The first dopant has a diffusion coefficient that is low enough to remain substantially in the doped region, and the energy gap and the atomic mass of the first dopant are higher than the energy gap and the atomic mass of the second dopant. In a case where the first dopant is indium atoms, the second dopant is preferably boron atoms. The dosage of the first dopant is 10 to 1000 times higher than the dosage of the second dopant.
Since the first dopant has a high atomic mass and a low diffusion coefficient, the junction depth and the channel depth of devices can be effectively controlled while the first dopant is implanted. Since the second dopant has a low atomic mass, the second dopant serves as a buffer to reduce the stress between the first dopant and the substrate. Thus, the first dopant does not gather to form clusters, and the freeze-out effect does not occur.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5185276 (1993-02-01), Chen et al.
patent: 405070276 (1993-03-01), None
Derwent ACC-No: 1993-137065. “Single crystal growing apparatus, for . . . indium arsinide, . . . ” Derwent commercial abstract of Japanese publication JP-405070276-A also listed above.

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