Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-04-12
2009-12-08
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S197000, C438S700000, C257SE21170, C257SE21051, C257SE21227, C257SE21229, C257SE21304, C257SE21315, C257SE21267
Reexamination Certificate
active
07629247
ABSTRACT:
A method of forming a three-dimensional, non-volatile memory array utilizing damascene fabrication techniques is disclosed. A bottom set of conductors is formed and a set of first pillar shaped elements of heavily doped semiconductor material as formed thereon. A mold is formed of insulating material having pillar shaped openings self-aligned with the first pillar shaped elements and a second semiconductor is deposited over the mold to form second pillar shaped elements aligned with the first pillar shaped elements. The pillar elements formed may be further processed by forming another mold of insulating material having trench openings aligned with the pillar shaped elements and then filling the trenches with conductive material to form conductors coupled to the pillar shaped elements.
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International Search Report and Written Opinion of International Application No. PCT/US2008/004665 (SD-MXA244-PCT) mailed Jun. 25, 2008.
Hsia Kang-Jay
Li Calvin
Petti Christopher
Dugan & Dugan PC
Nhu David
Sandisk 3D LLC
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