Method of fabricating a field-effect transistor utilizing an SOI

Details Method of fabricating a field-effect transistor utilizing an SOI Method of fabricating a field-effect transistor utilizing an SOI

1998-04-20

2000-01-04

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438153, H01L 2100

Patent

active

060109211

ABSTRACT:
To form a recess defining a channel region in a SOI layer, a LOCOS oxide film is formed on a surface of the SO layer and then removed. Then, side walls of CVD oxide is formed on side surfaces defining an opening of a LOCOS oxide restraining film. Then, a gate oxide film is formed on an exposed surface of the SOI layer inside the opening. Then, CVD polycrystalline silicon is formed on the whole wafer surface, and then etched back to form a gate electrode of polycrystalline silicon inside the opening. At this time, a top surface of the gate electrode is at a level lower than a top surface of the restraining film. Next, the restraining film and the side walls are removed and ion implantation into the SOI layer is performed using the gate electrode as a mask to thereby form a source and a drain region. Then, side walls are formed on side surfaces of the gate electrode, and a silicide film is formed on the gate electrode and the source and drain regions.

REFERENCES:
patent: 5439836 (1995-08-01), Giffard
patent: 5567966 (1996-10-01), Hwang
patent: 5719081 (1998-02-01), Racanelli et al.
patent: 5736435 (1998-04-01), Venkatesan et al.
patent: 5869359 (1999-02-01), Prabhakar
Lee, Jong-Ho et al., "Recessed Channel (RC) SOI NMOSFET's with Self-Aligned . . . ", Proceedings 1996 IEEE International SOI Conference, Oct., 1996, 2 pgs.

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