Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-05-06
2001-10-16
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S598000
Reexamination Certificate
active
06303497
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the fabrication process of a semiconductor device, and more particularly, relates to the fabrication process of a contact window.
2. Description of the Related Art
As the density or integrated circuits is further increased by continuously shrinking the device dimensions, the line width, the contact area and the junction depth are continuously being miniaturized. When forming a contact window of a source/drain region, due to a reduction of the contact area, the demand for an accurate alignment is increased. The probability of a misalignment is also increased. In the process of etching the contact window, it is common that the boundary of the neighboring isolation structure of the source/drain region, such as a field oxide layer (FOX) or a shallow isolation trench (STI), is coincidentally removed, resulting in a leakage current.
SUMMARY OF THE INVENTION
Accordingly, the invention provides a fabrication method of a contact window of a semiconductor device. This invention utilizes a conductive layer to cover the boundary of the neighboring isolation structure of the source/drain region, or to also cover the source/drain region. Further, an insulation layer is formed on the entire substrate. The insulation layer is then defined to form a contact window, exposing the source/drain region, or exposing the conductive layer located on top of the source/drain region.
A preferred embodiment of this invention in providing a fabricating method of a contact window comprises the following steps. A mask layer is formed on the substrate and then defined. An opening is formed, exposing the source/drain region and a portion of the neighboring isolation structure located on the outside boundary of the source/drain region. A conductive layer is then formed on the mask layer and on the opening. The conductive layer is etched back to form a spacer on the side wall of the opening to cover the device isolation structure. An insulation layer is further formed on the substrate, followed by forming a contact window in the insulation layer to expose the source/drain region.
Another preferred embodiment of this invention in providing a fabricating method of a contact window comprises the following steps. A mask layer is formed on the substrate and then defined. An opening is formed, exposing the source/drain region and the neighboring isolation structure located on the outside boundary of the source/drain region. A conductive layer is formed on th mask layer and on the opening. A planarization process is conducted, using the mask layer as a stop layer, to remove the conductive layer, forming a conductive pad in the opening. After forming an insulation layer on the substrate, an opening for the contact window is formed in the insulation layer to expose a portion of the conductive layer in the opening.
Another preferred embodiment of this invention in providing a fabricating method of a contact window comprises the following steps. A conductive layer is formed on the substrate and then defined to form a conductive pad, covering the source/drain region and a portion of the neighboring isolation structure located on the outside boundary of the source/drain region. An insulation layer is deposited on the substrate, followed by forming a contact window in the insulation layer to expose a portion of the conductive pad.
In accordance to this invention and the embodiments of this invention, during the process of forming the contact window, utilizing a conductive layer to protect the boundary of the device isolation structure prevents damage to the boundary of the device isolation structure, even though misalignment may occur. With the boundary of the device isolation structure being protected from damage, a current leakage at the source/drain region is prevented, thereby allowing the design for the dimensions of the contact window to be more flexible. The invention at the least, comprises the advantages of preventing a current leakage at the source/drain region and of increasing the contact area.
REFERENCES:
patent: 5094980 (1992-03-01), Shepela
patent: 5973371 (1999-10-01), Kasai
patent: 6146978 (2000-11-01), Michael et al.
Wolf, Silicon Processing for the VLSI Era vol. 2: Process Integration, 1990, Lattice Press, p. 199.
Huang Jiawei
J. C. Patents
Nguyen Tuan H.
Pert Evan
United Microelectronics Corp.
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