Method of fabricating a compound semiconductor device

Details Method of fabricating a compound semiconductor device Method of fabricating a compound semiconductor device

1994-02-15

1995-04-18

Breneman, R. Bruce

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156652, 156646, 156662, 437228, H01L 2100

Patent

active

054075319

ABSTRACT:
A device fabrication method includes an etching step for compound III/V semiconductor materials such as gallium arsenide or indium phosphide. The step is carried out in the chamber of a growth reactor under conditions that are compatible with a subsequent growth step performed in the same reactor. Specifically, etching is performed in a so-called pulsed mode wherein each etching interval is followed by an interval in which etching is interrupted. Moreover, a Group III species such as indium is introduced into the chamber during each etching interval to enhance the smoothness of the etched surface.

REFERENCES:
patent: 4975252 (1990-12-01), Nishizawa et al.
patent: 5037775 (1991-08-01), Reisman
patent: 5201995 (1993-04-01), Reisman et al.
C. Caneau et al., "Etching of InP by HC1 in an OMVPE Reactor", 1991, pp. 203-208, Journal of Crystal Growth 107 (1991).
H. J. Osten et al., "Surfactant-Mediated Growth of Germanium on Si(100) by MBE and SPE:", 1993, pp. 396-400, Journal of Crystal Growth 127 (1993).

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