Method of extract gate delay parameter in high frequency...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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C324S160000, C326S104000

Reexamination Certificate

active

07016798

ABSTRACT:
The present invention provides for determining gate speed parameters in a circuit. A first delay is selected. A second delay is selected, wherein the second delay is longer than the first delay. A clock signal is delayed as a function of the first delay. The clock signal is combined with the first delayed clock signal. A first pulse signal is produced from combining the clock signal with the first delayed clock signal. A clock signal is delayed as a function of the second delay. The clock signal is combined with the first delayed clock signal. A second pulse signal is produced from combining the clock signal with the second delayed clock signal. The first delayed clock signal is integrated. The second delayed clock signal is integrated. The first delayed integrated clock signal is compared with the second delayed integrated clock signal. When the first delayed integrated clock signal is greater than the second integrated clock signal, the gate delay is determined.

REFERENCES:
patent: 3629712 (1971-12-01), Clark
patent: 6002282 (1999-12-01), Alfke

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