Method of evaluating semiconductor device

Details Method of evaluating semiconductor device Method of evaluating semiconductor device

2006-12-11

2008-11-25

Wojciechowicz, Edward (Department: 2815)

Semiconductor device manufacturing: process

With measuring or testing

Electrical characteristic sensed

C257S048000, C257S401000, C257S653000, C430S005000, C430S296000

Reexamination Certificate

active

07456033

ABSTRACT:
The present invention provides a semiconductor device having an active region bent at right angles, wherein an interval between patterns for the active region and a gate is set larger than an arc radius of a curved portion (portion where a line is brought to arcuate form) formed inside the pattern for the bent active region. By defining and designing the pattern interval, the curved portion of the active region do not overlap the gate pattern, and the difference between a device characteristic and a designed value can be prevented from increasing.

REFERENCES:
patent: 6434053 (2002-08-01), Fujiwara
patent: 2002/0001927 (2002-01-01), Kawai
patent: 2003/0049940 (2003-03-01), Matsuhashi et al.
patent: 10-093101 (1998-04-01), None
patent: 2002-009292 (2002-01-01), None
patent: 2003-086807 (2003-03-01), None

Affiliated with

Also associated with

Rating

Method of evaluating semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of evaluating semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of evaluating semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4020929