Method of etching silicon materials

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation

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438753, 216 99, H01L 2176

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active

059306505

ABSTRACT:
Semiconductor integrated circuit processing is facilitated by an etch process illustratively applied to polysilicon and silicon nitride removal. The etch process illustratively comprises of the use of phosphoric acid with metal-containing additives to bring about an enhanced silicon etch rate effect.

REFERENCES:
patent: 5215930 (1993-06-01), Lee et al.
patent: 5607543 (1997-03-01), Eisenberg et al.
Pearce C.W. et al, "The Use of Metal Additions to Phosphoric Acid to Etch Polysilicon in Poly Buffered LOCOS Process", Science and Technology of Semiconductor Surface Preparation, Symposium pp. 459-464, Apr. 1997.
"A New Preferential Etch For Defects In Silicon Crystals", M. W. Jenkins, J. Electrochem. Soc., Solid-State Science and Technology, p.757, May 1997.
"MEMC Etch--A Chronium Trioxide--Free Etchant for Delineating Dislocations and Slip In Silicon", T.C. Chandler, J. Electrochemical Soc., Solid-State Science and Technology, p. 945, Mar. 1990.
"Polysilicon Emitter Bipolar Transistors", Ed. A. K. Kapoor and D. J. Roulston, IEEE J. Solid-State Circuit, 1997.
"Defect Delineation and Junction Staining Techniques for Silicon Using Wet Chemistry", C. W. Pearce, Invited Paper at The Electrochemical Society, Oct. 1991.
"High-Performance Transistors With Arsenic-Implanted Polysil Emitters", Jurgen Graul, Andreas Glasl, and Helmuth Murrmann, IEEE J. Solid-State Circuits, vol. SC-11, pp. 491-495, Aug. 1976.

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