Method of etching semiconductor metallic layer

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C216S041000, C216S067000, C216S075000, C216S077000, C438S734000, C438S737000, C438S742000

Reexamination Certificate

active

06500767

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 90106422, filed Mar. 20, 2001.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to an etching process. More particularly, the present invention relates to a method of etching a semiconductor metallic layer.
2. Description of Related Art
Due to the rapid reduction of device dimensions in semiconductor circuits, alignment accuracy in photolithographic and etching processes is compromised. Misalignment causes serious problems, especially in the patterning of a metallic conductive layer. This is because a conductive layer has a high reflectivity index. Hence, a portion of the light from a light source is reflected back during photo-exposure, leading to a deviation in size of the developed photoresist pattern. Ultimately, an inaccurate pattern is transferred to the conductive layer. To prevent such patterning errors, an anti-reflection coating (ARC) is generally deposited over the conductive layer to reduce back reflection.
Most anti-reflection coating is made from an organic or an inorganic material. In general, organic anti-reflection coating such as a polymer layer is formed the conductive layer after the photoresist layer. Conversely, inorganic anti-reflection coating such as a titanium nitride layer is formed over the conductive layer before the photoresist layer.
A titanium nitride anti-reflection coating not only prevents the production of unwanted back reflection during photo-exposure, but also protects the conductive layer against attack by corrosive agents and the infiltration of impurities. Currently, a silicon oxynitride layer (SiON) is often used as a strengthening layer for the anti-reflection coating so that anti-reflection capacity is further enhanced.
FIG. 1
is a schematic cross-sectional view showing a semiconductor device after a conventional metallic layer etching operation. The etching operation is conducted to pattern the anti-reflection coating and the metallic layer. As shown in
FIG. 1
, a substrate
100
is provided. A titanium nitride barrier layer
102
is formed over the substrate
100
and a patterned metallic layer
104
is formed over the barrier layer
102
through a metallic layer etching operation. A patterned anti-reflection coating is also formed over the patterned metallic layer
104
. However, defective recesses are often formed at the interface
108
between the metallic layer
104
and the anti-reflection coating
106
. A reason for this is the difference in etching rate between the metallic layer
104
and the anti-reflection coating
106
. When the metallic layer is etched, over-etching at the interface between the metallic layer
104
and the anti-reflection coating
106
occurs. Ultimately, recess cavities are formed in the corner region. Since convention method relies on the simultaneous removal of both the anti-reflection coating and the metallic layer in an etching operation, corner cutting at the metallic layer/anti-reflection coating interface is difficult to resolve.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a method of etching a semiconductor metallic layer so that corner cutting at the interface of the metallic layer and the anti-reflection coating is reduced.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of etching a semiconductor metallic layer. An anti-reflection coating etching operation using specific processing parameters is carried out to remove the anti-reflection coating and a pre-determined thickness of the metallic layer. This is followed by a metallic layer etching operation.
The invention provides a method of etching a metallic layer on a semiconductor substrate, with an anti-reflection layer formed on the metallic layer. A first stage etching operation is performed to etch the anti-reflection layer and a specified thickness of the metallic layer, including processing parameters, such as a top electrode power of about 400-700W, a bottom electrode power of about 100-200W, a chlorine to boron trichloride ratio of about 0.6-1.5, a gaseous nitrogen flow rate less than 10 sccm, a trifluoromethane flow rate less than 20 sccm, an overall gaseous flow rate of about 50-200 sccm, an operating pressure of about 8-15 mTorr. A second stage etching operation is then performed to etch the remaining metallic layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5883007 (1999-03-01), Abraham et al.
patent: 5952244 (1999-09-01), Abraham et al.
patent: 6133145 (2000-10-01), Chen
patent: 6242358 (2001-06-01), Chu et al.
patent: 6306771 (2001-10-01), Syau et al.
patent: 6383942 (2002-05-01), Narita et al.

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