Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2001-06-05
2004-06-01
Olsen, Allan (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S702000, C438S703000, C438S714000, C216S037000, C216S046000, C216S067000, C216S079000
Reexamination Certificate
active
06743727
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to etching deep, high aspect ratio openings in a substrate during the construction of microelectronic devices. More specifically, this invention relates to etching such openings using a reactive ion etching process in plasma reactor.
2. Description of Related Art
The fabrication of deep, high aspect ratio openings and trenches in a silicon substrate is desirable in several areas of ultra large scale integration (ULSI) processing. Trenches having a depth:width ratio of greater than about 15:1 may be considered high aspect ratio, but trenches having an aspect ratio of greater than 40:1 are occasionally required.
Plasma reactors are conventionally used to construct high aspect ratio openings using a reactive ion etching (RIE) process in which one or more gaseous etchants are used to simultaneously etch the opening and produce a sidewall passivating deposit during the etching process. The sidewall passivating deposit protects the sidewalls during etching and helps obtain the desired trench profile. It is known, however, that the sidewall passivating deposit tends to produce a buildup on other portions of the substrate, mask and inner surfaces of the plasma reactor.
It is also known that the aspect ratio of the opening can have a significant effect on the etching process. Very high aspect ratio openings are particularly difficult to produce with the desired vertical, smooth walls using known etching methods. Producing such openings in a cost-effective manner, with high etching rates and good throughput is essential for newer products where the opening may have a width of 0.135 micrometers or less.
A conventional etchant composition for silicon that produces a sidewall passivating deposit includes hydrogen bromide (HBr), oxygen (O
2
) and a fluorine containing compound such as sulfur hexafluoride (SF
6
) or nitrogen trifluoride (NF
3
). A silicon containing gas, such as silane (SiH
4
) may be added to increase the silicon content and improve the deposition of the passivating deposit to protect the sidewalls during etching of deep openings.
U.S. Pat. No. 6,127,278 discloses a process in which a first step of etching using a mixture of HBr and O
2
to produce the sidewall passivating deposit is followed by a second step of etching/cleaning with a mixture of HBr, O
2
and SF
6
to remove the passivating material from the sidewalls of the opening, as well as from the substrate surface and chamber walls.
It is believed that one difficulty with earlier techniques for producing high aspect ratio openings is the excess buildup of the sidewall passivating deposit near the upper portion of the opening. This buildup restricts the entry of reactive etching ions
eutrals into the lower areas of the opening and slows the etching rate significantly. Proposed methods of controlling this deposit, however, have all required that the substrate be physically removed from the plasma reactor, or that the etching plasma be turned off. The time required for these methods all result in decreased throughput. Such methods have not only increased processing time, and thereby adversely impacted throughput, they have also resulted in rough or stepped wall surfaces in the opening as a result of significant changes in the processing parameters during etching.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method of etching deep, high aspect ratio openings in a substrate having a high average etching rate and good throughput.
It is another object of the present invention to provide a method of etching deep, high aspect ratio openings in a substrate where the etching may be completed in a single plasma reactor without removing the substrate from the reactor chamber.
It is still another object of the present invention to reduce aspect ratio dependent etch behavior during etching in silicon and other semiconductor materials.
A further object of the invention is to provide a method of etching deep, high aspect ratio openings in a substrate where the walls of the openings are smooth.
It is yet another object of the present invention to provide a method of etching deep, high aspect ratio openings in a substrate where the etching plasma is continuously maintained.
It is yet another object of the present invention to provide a method of etching trenches that increases the trench wall area.
It is a further object of the present invention to provide a method of constructing dynamic random access memory (DRAM) and embedded dynamic random access memory (e-DRAM) cells that have increased capacitance by etching deeper trenches.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, a method of etching a deep, high aspect ratio opening in a substrate including the steps of:
etching the substrate with a first plasma formed using a first gaseous mixture including a bromine containing gas, an oxygen containing gas and a first fluorine containing gas, the etching step simultaneously producing a sidewall passivating deposit;
thinning the sidewall passivating deposit with a second plasma formed using a second gaseous mixture including a non-halogenated hydrogen containing gas and a second fluorine containing gas; and
repeating the steps of etching and thinning to produce a desired depth for the opening.
In the preferred method, the non-halogenated hydrogen containing gas is selected from the group consisting of silanes and ammonia, most preferably, a monosilane or disilane. The substrate remains in the same plasma chamber during the cycles of etching and thinning the sidewall passivating deposit. The plasma is continuously maintained to produce a smooth sidewall within the opening and keep throughput high. The etching rate may be reduced substantially during the thinning step even though the plasma is continuously maintained.
The step of etching is preferably repeated at equally spaced intervals and the step of thinning the sidewall passivating deposit is also repeated at equally spaced intervals between the equally spaced etching steps. This alternation of etching and thinning is repeated until the desired depth is reached. The repetition may be as few as two cycles and as many as twenty or more cycles to reach the desired depth. The invention is particularly useful in producing openings having a final depth to width ratio of 40:1 or greater, however lesser aspect ratio openings may also advantageously constructed using the method of this invention.
The bromine containing gas is typically HBr. The first and second fluorine containing gases are typically NF
3
, SF
6
, elemental fluorine or a mixture thereof. The oxygen containing gas is preferably O
2
.or O
2
. mixed with helium. The non-halogenated hydrogen containing gas is preferably a silane, such as monosilane or disilane, or ammonia. A bromine containing gas or an oxygen containing gas may also be included in the second gaseous mixture during the step of thinning the sidewall passivating deposit.
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Mathad Gangadhara S.
Panda Siddhartha
Ranade Rajiv M.
DeLio & Peterson LLC
International Business Machines - Corporation
Li, Esq. Todd M. C.
Olsen Allan
Peterson Peter W.
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