Method of etching and method of plasma treatment

Details Method of etching and method of plasma treatment Method of etching and method of plasma treatment

2002-01-11

2004-08-24

Olsen, Allan (Department: 1763)

Etching a substrate: processes

Gas phase etching of substrate

Application of energy to the gaseous etchant or to the...

C216S072000, C216S078000, C216S079000, C438S710000, C438S714000, C438S724000, C438S725000, C438S744000

Reexamination Certificate

active

06780342

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an etching method and a plasma processing method.
BACKGROUND ART
As ultra high integration in semiconductor devices increasing in recent years, manufacturing superfine metal wirings that conform to rigorous design rules has become a crucial technical requirement. However, when the aluminum wirings normally utilized in the prior art, such as wirings constituted of Al or an Al alloy, are miniaturized, the level of the electrical resistance becomes significant, which readily causes a wiring delay, lowering the operating speed of the semiconductor device. As a solution, adoption of Cu having a lower electrical resistance value than Al as the wiring material has been considered in recent years. However, Cu becomes oxidized more readily than Al. Accordingly, during the semiconductor manufacturing process, a Cu wiring layer is covered with a layer constituted of a material that does not contain O
2
, e.g., an SiN
x
layer, to prevent oxidation of the Cu wiring layer by assuring that it is not exposed to O
2
.
When connecting a Cu wiring to another wiring in a semiconductor device adopting a multilayer wiring structure, it is necessary to etch the SiN
x
layer and to form at the SiN
x
layer a connecting hole such as a via hole through which the Cu wiring layer is exposed. However, a CF (fluorocarbon) processing gas containing O
2
is usually utilized in the plasma etching process during which the SiN
x
layer is etched. As a result, the surface of the exposed Cu wiring layer becomes oxidized by O
2
or an oxide compound is formed at the Cu wiring layer during the etching process. Such a reaction product raises the electrical resistance value at the area where the Cu wiring is connected with the other wiring, thereby presenting a problem in that the device characteristics of the semiconductor device are compromised.
An object of the present invention, which has been completed by addressing the problem of the prior art discussed above, is to provide a new and improved etching method and a new and improved plasma processing method that solve the problem above and other problems.
DISCLOSURE OF THE INVENTION
In order to achieve the object described above, in a first aspect of the present invention, an etching method for etching an SiN
x
layer present on a Cu layer formed at a work piece placed in a processing chamber by raising to plasma a processing gas introduced into the processing chamber, which is characterized in that the processing gas contains a gas constituted of C, H and F and O
2
, is provided.
In the etching process implemented by using the gas constituted of C, H and F according to the present invention, the exposed surface of the Cu layer is not oxidized readily. In addition, this effect is sustained regardless of whether or not O
2
is present. For this reason, even when a, wiring, for instance, is connected at the exposed surface of the Cu layer, the electrical resistance value at the connection area is not raised. Furthermore, by adding O
2
into the gas constituted of C, H and F, it becomes possible to even more effectively prevent the oxidation of the Cu layer.
The gas constituted of C, H and F should be CH
2
F
2
, CH
3
F or CHF
3
.
In addition, it is desirable to add an inert gas into the processing gas. When an inert gas is added into the processing gas, the contents of the gas constituted of C, H and F and O
2
can be adjusted as necessary in correspondence to specific process requirements while maintaining the quantity of the processing gas introduced into the processing chamber at a predetermined level.
Moreover, in a second aspect of the present invention, a plasma processing method comprising a step in which an SiN
x
layer is etched by using a photoresist layer having a specific pattern formed therein, a step implemented after the etching step, a step implemented after said etching step, in which said photoresist layer is ashed and a step implemented after said ashing step, in which a plasma process is implemented on the exposed Cu layer by raising to plasma H
2
introduced into the processing chamber is provided.
It is to be noted that the exposed surface of the Cu layer may become oxidized during the ashing step as well. In addition, if a CF gas is used as the processing gas during the etching step, C (carbon atoms) and F (fluorine atoms) may be injected into the exposed surface of the Cu layer. Accordingly, in a third aspect of the present invention, the surface of the Cu layer is treated with H
2
plasma after the etching step and the ashing step to deoxidize the oxidized Cu and to remove C and F. As a result, the electrical resistance value at the connection area where the Cu wiring is connected to the other wiring is prevented from increasing even more effectively.


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Wong, T.K.S., et al., “Fabrication of Sub-20 nm Trenches in Silicon Nitride Using CHF3/O2Reactive Ion Etching and Oblique Metallization,” Journal of Vacuum Science and Technology: Part B, American Institute of Physics, New York, NY, vol. 10, No. 6, pp2393-2397.

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