Method of estimating wiring complexity degree in...

Details Method of estimating wiring complexity degree in... Method of estimating wiring complexity degree in...

2008-03-18

2008-03-18

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

11299757

ABSTRACT:
A method of estimating a wiring complexity degree in a semiconductor integrated circuit with a multi-layered wiring, which has a wiring structure including at least two layers or more, in laying signal wirings, includes a step of predicting a power-supply wiring space used in the semiconductor integrated circuit, a step of dividing the predicted power-supply wiring space onto respective wiring layers, and a step of estimating a complexity degree at a time of laying signal wirings, based on the predicted power-supply wiring space and a wiring specification in respective wiring layers every wiring layer.

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