Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent
1998-03-02
2000-08-08
Lintz, Paul R.
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
716 12, G06F 1500
Patent
active
060995785
ABSTRACT:
In a method of estimating wire length allowing highly precise estimation of the estimated wire length of a net, an object net is selected. Thereafter, the object net is developed into pin pairs. For each of the pin pairs, a subcircuit satisfying a prescribed relation with the pin pair is extracted from the semiconductor integrated circuit. From the subcircuit, information necessary for estimating wire length of the pin pair (number of nets in the subcircuit and total area of macro cells in the subcircuit) is extracted. Based on the extracted information of the subcircuit, estimated wire length of the pin pair is estimated. Based on the estimated wire length of the pin pair, estimated wire length of the object net is estimated.
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Joyce Margaret
Lintz Paul R.
Mitsubishi Denki & Kabushiki Kaisha
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