Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-04-09
2009-10-06
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C703S019000
Reexamination Certificate
active
07600206
ABSTRACT:
A method estimates the signal delay in a VLSI circuit and accurately estimates the delay and conversion time of a transmission signal in the circuit in order to prevent a designer of the VLSI circuit from erroneously judging the logic made by the designed circuit.
REFERENCES:
patent: 6014510 (2000-01-01), Burks et al.
patent: 6519748 (2003-02-01), Sakamoto
patent: 2002/0016950 (2002-02-01), Sakamoto
patent: 2007/0266357 (2007-11-01), Kimata et al.
Chu Chia-Chi
Feng Wu-Shiung
Hsu Chao-Hsuan
Lai Ming-Hong
Chang Gung University
Dinh Paul
Kamrath Alan
Kamrath & Associates PA
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