Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2000-08-09
2003-05-13
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S347000, C257S618000, C438S455000, C438S974000, C438S482000, C438S485000
Reexamination Certificate
active
06563133
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of epitaxial-like bonding of wafer pairs at low temperature, and more particularly to a method of bonding in which the wafer surfaces are modified to create surface and subsurface defect areas, and possibly amorphized, by ion implantation or plasma, preferably by boron-containing ions or a plasma such as B
2
H
6
.
2. Discussion of the Background
For many optoelectronic and electronic device applications, homo-epitaxial single crystalline layers consisting of same material with same crystalline orientation but different doping types or levels are necessary. For some device applications, active layers comprising single crystalline dissimilar materials are required. The active layers should be high crystallographic quality with interfaces that are thermally conductive and almost optical loss free. Conventional hetero-epitaxial growth techniques applied to these lattice mismatched active layers usually result in a large density of threading dislocations in the bulk of the layers. Bonding of single crystalline wafers of identical or dissimilar materials is an unique alternative approach to the epitaxial growth. Not only highly lattice-mismatched wafers can be bonded but also wafers with different crystalline orientations can be combined. Ideally, the mismatches of single crystalline bonding wafers are accommodated by dislocations (in lattice-mismatch case) or an amorphous layer (in orientation-mismatch case) localized at the bonding interface with no defects generated in the bulk area. This approach is termed epitaxial-like bonding. The epitaxial-like bonding can also be employed to prepare unique devices by integrating already processed device layers.
However, conventional epitaxial-like bonding is achieved by high temperature annealing. To bond wafers composed of thermally mismatched materials, severe and often damaging thermal stresses can be induced with high temperature annealing. Since thermal stresses can increase significantly with the size of dissimilar wafers, only small wafers currently can be epitaxially bonded at high temperatures. The high temperature annealing process can also produce unwanted changes to bonding materials and often prevents the bonding of processed device wafers. The bonding materials may decompose at high temperatures, even if the bonding wafers are thermally matched.
In order to epitaxially bond large wafers of dissimilar materials or processed wafers, an epitaxial-like bonding interface must be achieved at or near room temperature, or one wafer of the bonded pair must be thinned sufficiently before annealing to elevated temperatures. Although Göesele et al. in Applied Physics Letters 67, 3614 (1995) and Takagi et al in Applied Physics Letters 74, 2387, 1999 reported room temperature epitaxial-like bonding of silicon wafers in ultrahigh vacuum, high temperature (>600° C.) pre-annealing in the former case or high external pressure (>1 MPa) in the latter case were required to achieve the bond that may introduce undesired effects to the bonding wafers.
Recently, M. Bruel in Electronics Letters 31,1201 (1995) reported a promising generic thinning approach using a hydrogen-induced layer transfer method (so-called smart-cut method). In this approach, H atoms are implanted into a Si wafer to such concentration that a significant fraction of Si—Si bonds are broken creating a buried H-rich layer of micro-cracks susceptible to cleavage or fracture. By bonding the topmost oxide covered hydrophilic Si wafer surface to another substrate, a thin layer of the Si wafer can then be transferred by fracture of the H-rich region. However, this process requires that the bonding energy between the bonded wafers be higher than the fracture energy of the hydrogen-induced crack region at the layer transfer temperature. The layer transfer temperatures must be lower than the temperature beyond which hydrogen molecules in the material become mobile. For silicon, the temperature is about 500° C. (see Chu et al in Physics Review B, 16, 3851 (1987)). The bonding energy of conventional HF dipped hydrophobic silicon wafer pairs is higher than the hydrogen-induced region only after annealing at temperatures higher than 600° C. Therefore, this process does not work for oxide-free hydrophobic silicon wafer bonding.
Typically, HF-dipped, hydrogen-terminated hydrophobic silicon wafers are used to realize epitaxial-like bonding after annealing at >700° C. In order for bonded hydrophobic silicon wafer pairs to reach bulk fracture energy, Tong et al. in Applied Physics Letters 64, 625 (1994) reported that hydrogen (from HF-dip, mainly Si—H
2
and Si—H terminated hydrophobic silicon surfaces at the bonding interface) must be removed so that strong Si—Si epitaxial bonds across the mating surfaces can be formed. The reaction is illustrated in Equation (1).
Si—H+H—Si→Si—Si+H
2
(1)
The release of hydrogen from a stand-alone silicon wafer dipped in HF was demonstrated to start at about 367° C. from Si—H
2
and 447° C. from Si—H in an ultrahigh vacuum. Since hydrogen molecules become mobile in silicon only at temperatures higher than 500° C., annealing at temperatures higher than 700° C. have been found necessary to completely deplete hydrogen from the bonding interface that results in a high bonding energy. Therefore, the smart-cut method for a layer transfer using conventional HF-dipped silicon wafer pairs is not possible because the bonding energy is too low at layer transfer temperatures that are lower than 500° C.
Based on above arguments, it becomes clear that the development of a low temperature epitaxial-like wafer bonding technology that is both cost-effective and manufacturable is essential for many advanced materials and device applications.
SUMMARY OF THE INVENTION
Accordingly, one object of this invention is to provide a wafer bonding method and bonded structure in which epitaxial-like bonding is achieved at near room temperature in ambient conditions without an external pressure.
Another object of this invention is to provide a wafer bonding method and bonded structure using bonding surfaces treated to obtain amorphized or partially amorphized surfaces by ion implantation or plasma, preferably by boron-containing ions or plasma.
These and other objects of the present invention are provided by a method for bonding first and second substrates including steps of preparing substantially oxide-free first and second surfaces of respective first and second substrates, creating a surface defect region in each of said first and second surfaces, and bonding said first and second surfaces. Creating the defective region may include plasma-treating the first and second surfaces of the first and second substrates with a plasma, and preferably a boron-containing plasma. The plasma-treating step may utilize a plasma in reactive ion etch (RIE) mode using B
2
H
6
gas, and possibly a mixture of B
2
H
6
, He, and Ar gases. Other gas plasmas, such as Ar may also be used.
As a result of the plasma-treating step, a thin amorphous layer may be formed in the first and second surfaces. A monolayer of boron may also be on said first and second surfaces and first and second surfaces may be doped with boron when a boron-containing plasma is used. Also, a few monolayers of boron are introduced into each of the first and second surfaces during said plasma-treating step.
After contacting, the substrates are maintained in contact, preferable under low vacuum but also in ambient air. A bonding energy of about 400 mJ/m
2
may be obtained at room temperature. Also, when the bonded pair of substrates is maintained at a temperature no more than about 250° C. after contacting, a bond strength of at least about 1500 mJ/m
2
may be obtained, and a bonding energy of about 2500 mJ/m
2
(bulk silicon fracture energy) may be obtained at 350° C. The method may also include step of annealing said bonded first and second surfaces at a temperature in the range of about 250-450° C., or at a temperat
Díaz José R.
Lee Eddie
Ziptronix, Inc.
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