Method of ensuring the integrity of TLB entries after...

Electrical computers and digital processing systems: virtual mac – Virtual machine task or process management

Reexamination Certificate

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C718S108000

Reexamination Certificate

active

07823151

ABSTRACT:
Systems and methods are disclosed to support partial physical addressing modes on a virtual machine. An example method disclosed herein identifies a change of a first translation mode to a second translation mode on a host hardware platform, the host hardware platform including a processor, the processor further including region registers; identifies an address as cacheable or non-cacheable; saves contents of the region registers for the first translation mode to processor memory; updates content of the region registers corresponding to the second translation mode; identifies a change of the second translation mode to the first translation mode; and populates the region registers with the contents of the saved region registers corresponding to the first translation mode.

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