Method of eliminating etch ridges in a dual damascene process

Details Method of eliminating etch ridges in a dual damascene process Method of eliminating etch ridges in a dual damascene process

2007-03-20

2007-03-20

Everhart, Caridad M. (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S638000, C257SE21579

Reexamination Certificate

active

10903711

ABSTRACT:
A dual damascene process employs a via fill material (38) with an etch rate that is within 60% of an etch rate that an underlying dielectric layer (34) etches for a given dielectric etch chemistry in which a trench (48) and via (50) are being formed. In one embodiment, an organic via fill material plug (40) is employed in conjunction with a bottom anti-reflective coating (BARC) material layer (42). Both the organic via fill material plug (40) and the BARC material layer (42) are selected to have a material with an etch rate that within 60% of an etch rate that an underlying dielectric layer (34) etches for a given dielectric etch chemistry in which the trench (48) and via (50) are formed.

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