Semiconductor device manufacturing: process – Making field effect device having pair of active regions...
Patent
1998-04-22
1999-12-14
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
438238, 438533, 438586, 438597, H01L 218232, H01L 218234, H01L 21425
Patent
active
060016744
ABSTRACT:
The method of forming buried contacts on a semiconductor substrate is as follows. At first, a gate insulator layer is formed over the substrate. A first silicon layer is then formed over. A buried contact opening is defined through the first silicon layer and the gate insulator layer extending down to the substrate. The substrate is then doped for forming a buried contact region. Next, a second silicon layer and a masking layer is formed. A shielding opening is then defined through the masking layer and the second silicon layer to a portion of the buried contact region. At the same time, an upper gate electrode and an interconnect are defined by removing a portion of the second silicon layer. A shielding layer is formed in the shielding opening over the buried contact region. A lower gate electrode is then defined by removing a portion of the first silicon layer. Following the removal of the masking layer, the substrate is doped for forming a second doping region under a region uncovered by the upper gate electrode, the interconnect, and the shielding layer. A sidewall structure is then formed on the sidewall of the upper gate electrode and the lower gate electrode. The substrate is doped for forming a third doping region in the second doping region under a region uncovered by the sidewall structure. Finally, a thermal process is performed to finish the formation of the trench-free buried contact.
REFERENCES:
patent: 4701423 (1987-10-01), Szluk
patent: 5082796 (1992-01-01), El-Diwany et al.
patent: 5126285 (1992-06-01), Kosa et al.
patent: 5162259 (1992-11-01), Kolar et al.
patent: 5580806 (1996-12-01), Chang et al.
patent: 5652160 (1997-07-01), Lin et al
patent: 5654231 (1997-08-01), Liang et al.
patent: 5700711 (1997-12-01), Hsu et al.
patent: 5705437 (1998-01-01), Wu et al.
patent: 5780331 (1998-07-01), Liaw et al.
Shye-Lin Wu et al., Characterization of Thin Textured Tunnel Oxide Prepared by Thermal Oxidation of Thin Polysilicon Film on Silicon, IEEE Transactions on Electron Devices, vol. 43, No. 2, Feb. 1996.
Texas Instruments--Acer Incorporated
Trinh Michael
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