Method of editing a semiconductor die

Details Method of editing a semiconductor die Method of editing a semiconductor die

2008-04-01

2008-04-01

Ho, Tu-Tu (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S758000, C257SE21526, C257SE23179, C438S014000

Reexamination Certificate

active

11451918

ABSTRACT:
Resistance and capacitance are added to a prototype die to fix or identify performance issues with the integrated circuit formed in the die by forming a thin piece of silicon on the top surface of the die. For resistance, vias are formed to regions on the metal traces and to opposite ends of the piece of silicon using a FIB system. For capacitance, a dielectric is formed on the piece of silicon, and a layer of metal is formed on the dielectric. Vias are formed to regions on the metal traces, to the piece of silicon, and to the layer of metal using the FIB system.

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