Method of dynamically controlling cache size

Details Method of dynamically controlling cache size Method of dynamically controlling cache size

2006-10-24

2006-10-24

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S129000, C707S793000

Reexamination Certificate

active

07127560

ABSTRACT:
A power saving cache and a method of operating a power saving cache. The power saving cache includes circuitry to dynamically reduce the logical size of the cache in order to save power. Preferably, a method is used to determine optimal cache size for balancing power and performance, using a variety of combinable hardware and software techniques. Also, in a preferred embodiment, steps are used for maintaining coherency during cache resizing, including the handling of modified (“dirty”) data in the cache, and steps are provided for partitioning a cache in one of several way to provide an appropriate configuration and granularity when resizing.

REFERENCES:
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patent: 6845432 (2005-01-01), Maiyuran et al.
patent: 2003/0061448 (2003-03-01), Rawson
patent: 2003/0145239 (2003-07-01), Kever et al.
patent: 2003/0236948 (2003-12-01), Erdner et al.

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