Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-02-27
2007-02-27
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10947308
ABSTRACT:
A method of diagnosing a circuit layout and a computer system for performing the method. First, a layout arranging rule is defined in a second file, and a circuit layout is defined in a first file. A diagnosing program compares the first file and the second file and checks whether the circuit layout violates the layout arranging rule. In addition, the diagnosing program searches the first file to determine if any groups of power test pads have a total number of power test pads which is less than a safety value, to indicate if any additional power test pads are required for any particular group. The diagnosing program also determines which test pads have an interval less than a safety distance, to indicate if any intervals of the test pads should be amended. The computer system can rapidly and exactly determine any problems in the arrangement of the test pads in the circuit layout, so as to save manpower and time.
REFERENCES:
patent: 6516452 (2003-02-01), Meding
patent: 2003/0145297 (2003-07-01), Cote et al.
ASUSTeK Computer Inc.
Birch & Stewart Kolasch & Birch, LLP
Whitmore Stacy A
LandOfFree
Method of diagnosing circuit layout and computer system for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of diagnosing circuit layout and computer system for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of diagnosing circuit layout and computer system for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3829341