Electrical computers and digital data processing systems: input/ – Interrupt processing – Processor status
Reexamination Certificate
2006-09-14
2008-12-09
Myers, Paul R. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Processor status
C710S260000
Reexamination Certificate
active
07464211
ABSTRACT:
A method for handling multiple system management interrupt (SMI) events in a multiprocessor system. The method comprises a first set of one or more processors in the multiprocessor system receiving a first SMI event. The first set of processors then enter an SMI handler for the first SMI event. The method further comprising determining that fewer than all of the active processors in the multiprocessor system are in the SMI handler for the first SMI event, and scheduling a second SMI event based upon the content of the first SMI event. The first set of processors each exit the SMI handler for the first SMI event without handling the first SMI event. Preferably, the method includes handling the second SMI event as a result of determining that all of the active processors in the multiprocessor system are in the SMI handler for the second SMI event.
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Byrd Cynthia
International Business Machines - Corporation
Myers Paul R.
Stiglic Ryan M.
Streets Jeffrey L.
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