Method of deciding error rate and semiconductor integrated...

Details Method of deciding error rate and semiconductor integrated... Method of deciding error rate and semiconductor integrated...

2007-07-24

2007-07-24

Baderman, Scott (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S049000, C714S054000

Reexamination Certificate

active

10808285

ABSTRACT:
An error rate select circuit activated in an information sustaining mode is provided, wherein a plurality of pieces of data are read from a dynamic memory circuit and inspection bits which are used to detect an error existing in the pieces of data are generated. If no error is detected, a first predetermined value is added to a total value. If an error is detected, a second predetermined value greater than the first predetermined value is subtracted from the total value. If the total value exceeds a first set value, a refresh period is lengthened by a predetermined time increment. If the total value becomes smaller than a second set value, the refresh period is shortened by the predetermined time increment.

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