Method of crystallizing an amorphous silicon layer

Details Method of crystallizing an amorphous silicon layer Method of crystallizing an amorphous silicon layer

1999-04-27

2001-11-06

Le, Vu A. (Department: 2824)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S149000, C438S151000, C438S155000, C438S162000, C438S166000

Reexamination Certificate

active

06312979

ABSTRACT:

This application claims the benefit of Korean Patent Application No. 1998-15806, filed on Apr. 28, 1998, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method of crystallizing an amorphous silicon layer by depositing a crystallization-inducing substance on an amorphous silicon layer and crystallizing the amorphous silicon layer with metal-induced crystallization (MIC).
2. Discussion of Related Art
Field effect mobility and stability against ray-irradiation of polycrystalline silicon thin film transistors (poly-Si TFTs) are greater and better than those of an amorphous silicon thin film transistor (a-Si TFT). The poly-Si TFT is applied to a driving device and a basic device of a peripheral circuit of an active matrix liquid crystal display (AMLCD).
Able to be fabricated on a glass substrate, a low temperature poly-Si TFT (TFT fabricated under a low temperature condition) used in the AMLCD lowers production costs and provides a wide vision. Moreover, the low temperature poly-Si TFT shows operating speeds of a peripheral circuit as good as that of a high temperature poly-Si TFT (TFT fabricated under a high temperature).
There are various methods of fabricating poly-Si, which methods are mainly divided into two. One method is to directly depositing poly-Si; the other method is to crystallize an already deposited amorphous silicon. There are many methods of depositing directly poly-Si, such as thermal chemical vapor deposition (CVD), hydrogen radical(HR) CVD, catalytic CVD, electron cyclotron resonance (ECR) CVD, plasma enhanced (PE) CVD, low pressure (LP) CVD, or the like.
Solid phase crystallization (SPC) and liquid phase crystallization (LPC) are used for crystallizing an already deposited amorphous silicon. Specifically, SPC by rapid thermal annealing (RTP) or furnace annealing has benefits in forming poly-Si having crystalline phases of relatively large size and which provides a simplified-fabrication process. Yet it also has defects of annealing over 600° C., requiring a thermal treatment which takes a long time.
A crystallization method by a pulse laser such as an excimer laser, etc., has the benefits of low temperature of a substrate under 400° C. for the growth and excellent field effect mobility. However, the method shows poor uniformity on a layer and requires expensive equipment.
Lately, there are many studies to lower the crystallization temperature to form a poly-Si. One of them is metal induced crystallization (MIC). The temperature for crystallizing amorphous silicon drops down under 500° C. provided that specific metals are contacted with amorphous silicon, which is the so-called MIC effect. The MIC effect appears in many metal atoms. The MIC effect is driven by two kinds of metals, which are the noble metals, such as Au[13], Ag, Al[11], Sb[14], In[15], etc., and the transition metals forming silicide with silicon, such as Ti[16], Ni[17,18], Cu, and the like.
MIC has various factors of crystallization according to each metal, namely, the crystallization depends on a species of metal contacted with silicon. The noble metals, such as Al, Au, Ag, etc., are affected by Si diffusion at an interface with Si. Silicide of a pseudo-stable state are formed by Si diffusion at the interface between Si and metal. Such silicide accelerates Si crystallization by lowering crystallization energy. Si atoms penetrate into a metal-silicide layer to be diffused, whereby Si crystals are formed at a border of silicide. In this case, flower-typed crystals are extracted to the surface. While transition metals, such as Ni, Ti, etc., depend mainly on metal diffusion caused by annealing, metal diffusion is driven to an Si layer from an interface between metal and Si to form silicide which accelerates crystallization of Si and decreases the crystallization temperature.
MIC by Ni or NiSi
2
(which is the last phase of Ni silicide) accelerates crystallization by working as a crystallizing nucleus. In fact, a lattice constant of NiSi
2
is 5.406 Å, which is similar to that of Si of 5.430 Å. Thereby NiSi
2
which works as a crystallizing nucleus of amorphous silicon between Ni and amorphous silicon, accelerates crystallization.
Ni silicide experiences phase changes through Ni
2
Si [NiSi, NiSi
2
] in accordance with the increase of annealing temperature. When the annealing temperature is under 200° C., NiSi
2
of an orthorhombic structure is formed. As the annealing temperature increases, NiSi, which shows the lowest resistance among Ni silicide and whose directions are [211] and [102], is formed between 250° C. and 390° C. Between 325° C. and 450° C., fluoride-type NiSi
2
is formed. Then amorphous silicon turns into poly-Si, as NiSi
2
working as a nucleus for crystal growth passes through the amorphous silicon layer.
Ni-induced crystallization experiences three major steps: forming NiSi
2
silicide, working as a crystallizing nucleus for amorphous silicon, and changing amorphous silicon into poly-Si on NiSi
2
's passing through an amorphous silicon layer.
For an example of MIC, there is a method comprising the forming of an Ni layer to the thickness of over 25 Å on an amorphous silicon layer and then annealing the amorphous silicon layer thermally.
Referring to
FIG. 11
d
, the degree of roughness at the surface of a silicon layer formed by the above method of crystallizing an amorphous silicon layer is unfortunately too high. This is because the Ni layer is too thick. As the sizes of the grains become smaller, due to the close distances among crystallizing nuclei, the surface becomes rougher due to the crystallization activated by the crystallizing nuclei, which number is increased.
In order to generate the crystallizing nuclei, at least several hundred Ni atoms are essential. Accordingly, as the Ni layer becomes thick, the distances among the nuclei become closer and causes roughness on the surface due to the crystallization by the nuclei. Such roughness on the surface of the layer makes the characteristics of a TFT poor.
Moreover, the MIC includes a method comprising the coating of a surface of an amorphous silicon layer with a metal solution, such as an Ni solution, and annealing thermally the amorphous silicon layer.
Referring to
FIG. 17B
, when the amorphous silicon layer is crystallized by the above method, a perfect crystallization is completed, after long time at 500° C. But the surface is contaminated by a solution and it is very difficult to leave an uniform Ni thickness over large area.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method of crystallizing an amorphous layer that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
The object of the present invention is to provide a method of crystallizing an amorphous layer which crystallizes an amorphous silicon layer by metal induced crystallization by depositing an induced substance layer to the minimum thickness on the amorphous silicon layer for inducing the Si crystallization, whereby the degree of Si crystallization is maximized without metal contamination.
Another object of the present invention is to provide a method of crystallizing an amorphous layer which crystallizes an amorphous silicon layer by metal induced crystallization by depositing an induced substance layer having a predetermined metal density on the amorphous silicon layer for inducing the Si crystallization, whereby the degree of Si crystallization is maximized without metal contamination.
Additional features and advantages of the invention will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawi

Affiliated with

Also associated with

Rating

Method of crystallizing an amorphous silicon layer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of crystallizing an amorphous silicon layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of crystallizing an amorphous silicon layer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2598705