Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor
Reexamination Certificate
2000-04-14
2002-05-14
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Amorphous semiconductor
C438S149000, C438S164000, C438S166000, C438S487000, C438S488000, C438S489000, C438S495000, C438S506000, C438S508000, C438S151000, C438S795000, C257S052000, C257S075000
Reexamination Certificate
active
06387779
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method of crystallizing a silicon film, a thin film transistor, and a fabricating method for a thin film transistor. More particularly, the present invention relates to a method for crystallizing a silicon film using laser energy, a thin film transistor, and a fabricating method for a thin film transistor using laser energy.
2. Discussion of Related Art
Silicon can be crystallized by using laser energy to melt amorphous silicon and extracting silicon crystals by cooling down or solidifying the fused silicon. In this case, monocrystalline silicon is formed if the growing direction of silicon is uniform relative to the growth of grains. Otherwise, polycrystalline silicon is formed when a plurality of crystals grow randomly and simultaneously.
When an active layer of a thin film transistor (hereinafter abbreviated TFT) is formed by crystallizing an amorphous silicon layer, TFT characteristics are improved by reducing the number of grain boundaries (which hinders the transportation of carriers) by increasing the size of the respective silicon grains.
Moreover, a reduced number of grain boundaries improves the interfacial characteristics between the silicon and the gate insulating layers since the grain boundaries cause deterioration in the interface between the silicon and the gate insulating layers.
FIG. 1A
to
FIG. 1D
are cross-sectional views illustrating crystallization of an amorphous silicon film according to a related art.
Referring to
FIG. 1A
, a buffer oxide layer
10
and an amorphous silicon film
11
are successively deposited on an insulating substrate
100
.
Referring to
FIG. 1B
, the substrate
100
is supplied with laser energy by irradiating with a laser beam. In this case, the laser beam has sufficient energy to melt down the entire amorphous silicon film
11
except predetermined solid silicon regions
12
of the amorphous silicon film. The reference numeral ‘
13
’ denotes a liquid silicon region which is fused by being exposed to the laser beam.
Referring to
FIG. 1C
, the liquid silicon region
13
is cooled down to encourage the growth of silicon grains when the supply of the laser energy is stopped.
First, the silicon regions
12
remaining in the liquid silicon
13
become seeds of silicon grains for silicon crystallization.
Then, silicon grains
14
-
1
,
14
-
2
, and
14
-
3
which grow from the silicon regions
12
stop when they collide with one another. In accordance with the location of each seed, silicon crystallization occurs simultaneously in various spots of the silicon film, thereby forming a polycrystalline silicon film
14
.
Referring to
FIG. 1D
, a gate insulating layer
16
and a gate electrode
17
are formed on an active layer
15
by patterning the crystallized silicon film by photolithography.
A TFT is fabricated by forming a source region
15
S and a drain region
15
D by doping the exposed parts of the active layer
15
by a known method.
Unfortunately, protruding silicon regions (caused by the collision of silicon grains grown during crystallization) are generated on the surface of the active layer
15
.
The grain boundaries protruding out of the surface of the active layer
15
deteriorates step coverage of the gate insulating layer as well as the interfacial contact characteristics between the active layer and gate insulating layer, thereby negatively affecting the TFT characteristics.
Moreover, the plurality of grain boundaries existing inside the active layer lowers the transporting speed of carriers, thereby reducing current mobility in the TFT.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method of crystallizing a silicon film, a thin film transistor, and a fabricating method for thin film transistor that substantially obviate one or more of the problems due to limitations and disadvantages of the related art.
The present invention therefore improves the characteristics of a silicon film by means of lengthening the time that the silicon is in a liquid state during the crystallization of liquid silicon in order to increase the silicon grain size.
Additional features and advantages of the invention are set forth in the description which follows and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the present invention includes forming a buffer layer on a substrate and forming an amorphous silicon film on the buffer layer. The amorphous silicon film includes a first region having a first dimension and second regions connected to respective ends of the first region and having respective second dimensions larger than the first width. The buffer layer under the amorphous silicon film is partially etched using the amorphous silicon as a reference mask. The buffer layer under the first region is removed to form a space, and a central part of the second regions contact the remaining buffer layer at respective locations. The amorphous silicon film is then crystallized.
Another embodiment of the present invention comprises forming a buffer layer on a substrate and forming an amorphous silicon film on the buffer layer. The amorphous silicon film includes a first region having a first dimension and second regions connected to respective ends of the first region and having a second dimension greater than the first dimension. The buffer layer is partially etched by an amount between the first and second dimensions by using the amorphous silicon as a reference mask. Therefore, the buffer layer under the first region is removed to form a space and a central part of each second region contacts the remaining buffer layer. The amorphous silicon film is then crystallized. An active layer supported by the remaining buffer layer is formed by patterning the crystallized silicon film by . A gate insulating layer is formed covering the substrate including the active layer. A gate electrode is formed on the gate insulting layer over the active layer. A source region and a drain region is formed in the active layer by carrying out impurity doping using the gate electrode as a mask.
In a further embodiment of the present invention, a thin film transistor includes a substrate, a buffer layer having a protruding part and formed on the substrate, and an active layer supported by the protruding part and including a channel region, a source region, and a drain region. The channel region is defined in a portion which is not supported by the protruding part of the buffer layer and the source and drain regions are defined at both ends of the channel region. A gate insulating layer is formed on the active layer, and a gate electrode is formed on the gate insulating layer over the active layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
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Aya et al., Pub. No.: US 2001/0003659 A1 Pub. Date: Jun. 14, 2001.*
Kim, Pub. No.: US 2001/0012702 A1, Pub, Date: Aug. 9, 2001.
Lee Sanggul
Yi Jonghoon
Birch & Stewart Kolasch & Birch, LLP
Keshavan Belur V
LG. Philips LCD Co. LTD
Smith Matthew
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