Method of cross-mapping integrated circuit design formats

Details Method of cross-mapping integrated circuit design formats Method of cross-mapping integrated circuit design formats

2005-09-06

2005-09-06

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C702S094000, C702S095000

Reexamination Certificate

active

06941530

ABSTRACT:
A method of cross-mapping integrated circuit (“IC”) elements nets in a IC and/or directing a probe to points on an IC to achieve minimal interference from adjacent structures is disclosed. The method of provides a more streamlined approach than referencing points from a physical layout representation of the IC to the actual IC being tested. The improved correlation between the actual packaged IC and the layout of the IC is accomplished using artificial locator cells. Preferably, the artificial locator cells are generated from mathematical operations of the extracted version of the layout, and they further provide coordinate information for where minimal interference from adjacent structures may be accomplished. Artificial locator cells may be generated from a layout representing a hierarchical representation or alternately each element that is instantiated from a reference library may already have artificial locator cells included.

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