Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-12-03
2003-12-30
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06671868
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for creating pinouts for integrated circuits generally and, more particularly, to a method for creating pinouts for multi-chip module (MCM) devices.
BACKGROUND OF THE INVENTION
A conventional approach to generating pinouts involves manually creating a complete substrate netlist, a pin grid of a ball grid array (BGA) package, a set of substrate rules, a software pins file and a marketing grid. Manual creation of tables and grids is time-consuming and prone to human error. Such errors can be difficult to isolate and can affect (i) datasheets, (ii) software that uses the pinout information (e.g., PLD placement software such as Warp™, a trademark of Cypress Semiconductor Corporation, San Jose, Calif.), (iii) substrate design, and (iv) other products that extract information from the pinout process.
In another conventional approach, complex spreadsheet formulae are used for the tables to create pinouts and grids. However, the spreadsheets can be impractical for some re-formatting and text manipulation work that is needed to translate a data source (i.e., the pinout table) to a data destination (i.e., the software pins file). Furthermore, spreadsheet formulae can be inflexible. Specifically, changing one aspect of data generation can require modification to every formula in the spreadsheet, a manual task that is prone to omission.
SUMMARY OF THE INVENTION
The present invention concerns a method for creating pinouts for inter-die connections comprising the steps of filling a number of columns of a computer readable file with information about pads and balls of the inter-die connections, marking the portions of the computer readable file indicating a correlation between pads and balls and generating a netlist according to one or more sets of computer executable instructions in the computer readable file.
The objects, features and advantages of the present invention include providing a method for creating pinouts for multi-chip module (MCM) devices that may (i) provide computer executable scripts to automate creation of a majority of the connection netlist, (ii) combine scripts and human control to create pinouts, (iii) provide scripts to produce different deliverables based on a connection netlist for different recipients needing information in the connection netlist to varying extents and in different formats, and/or (iv) efficiently create pinouts for MCM devices.
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Cypress Semiconductor Corp.
Kik Phallaka
Maiorana P.C. Christopher P.
Smith Matthew
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