Method of creating defect free high Ge content (>25%)...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Non-single crystal – or recrystallized – material containing...

Reexamination Certificate

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C257S347000, C257S616000, C438S311000, C438S479000

Reexamination Certificate

active

10939736

ABSTRACT:
A method for achieving a substantially defect free SGOI substrate which includes a SiGe layer that has a high Ge content of greater than about 25 atomic % using a low temperature wafer bonding technique is described. The wafer bonding process described in the present application includes an initial prebonding annealing step that is capable of forming a bonding interface comprising elements of Si, Ge and O, i.e., interfacial SiGeO layer, between a SiGe layer and a low temperature oxide layer. The present invention also provides the SGOI substrate and structure that contains the same.

REFERENCES:
patent: 6100166 (2000-08-01), Sakaguchi et al.
patent: 6524935 (2003-02-01), Canaperi et al.
patent: 6593641 (2003-07-01), Fitzergald
patent: 2004/0195656 (2004-10-01), Ghyselen et al.
patent: 2005/0054175 (2005-03-01), Bauer
patent: 2006/0003555 (2006-01-01), Adam et al.
Chu et al.—Search Report for PCT/US05/08493, dated Aug. 16, 2006.

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