Method of controlling the top width of a deep trench

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S243000, C438S246000, C438S386000, C438S389000, C438S430000, C438S431000

Reexamination Certificate

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06875669

ABSTRACT:
A method of controlling the top width of a deep trench. A conductive layer is formed on the trench over a substrate of polysilicon with a recessed structure. An additional layer of amorphous silicon (α-Si) is deposited onto the polysilicon. After subsequent oxidation, the amorphous silicon is converted to SiO2. According to the invention, the top width of a deep trench is controlled, protecting bit lines from sub-threshold leakage.

REFERENCES:
patent: 6083787 (2000-07-01), Lee
patent: 6426253 (2002-07-01), Tews et al.
patent: 6437381 (2002-08-01), Gruening et al.
patent: 6777303 (2004-08-01), Schrems et al.
patent: 20020024082 (2002-02-01), Tsunashima et al.
patent: 20040241953 (2004-12-01), Wang et al.

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