Method of controlling non-volatile ferroelectric memory cell for

Details Method of controlling non-volatile ferroelectric memory cell for Method of controlling non-volatile ferroelectric memory cell for

1997-06-06

1998-06-16

Nguyen, Tan T.

Static information storage and retrieval

Systems using particular element

Ferroelectric

36518508, 365117, 365150, G11C 1122

Patent

active

057681767

ABSTRACT:
A potential level is applied between both electrode of a capacitor so as to polarize a ferroelectric layer sandwiched between the electrodes, and, thereafter, the node between the capacitor and a field effect transistor is caused to enter the floating state so that a large amount of electric charge is induced in the node by virtue of both of the ferroelectric component and the paraelectric component of the capacitor.

REFERENCES:
patent: 5300799 (1994-04-01), Nakamura et al.
patent: 5412596 (1995-05-01), Hoshiba
patent: 5541871 (1996-07-01), Nishimura et al.
patent: 5615144 (1997-03-01), Kimura et al.
patent: 5621680 (1997-04-01), Newman et al.
patent: 5633821 (1997-05-01), Nishimura et al.
S. Shukuri et al., "Super-Low-Voltage Operation of a Semi-Static Complementary Gain DRAM Memory Cell", Digest Technical Papers of 1993 Symposium on VLSI Technology, pp. 23 and 24.

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