Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2011-06-07
2011-06-07
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S189090, C365S191000, C365S230020, C365S189080
Reexamination Certificate
active
07957217
ABSTRACT:
The invention relates generally to a multi-chip package (MCP) memory device, and more particularly, but without limitation, to a MCP memory device having a reduced size. In one embodiment, the MCP memory device includes: a transfer memory chip; and a plurality of memory chips coupled to the transfer memory chip, each of the plurality of memory chips including an internal voltage generating circuit, the transfer memory chip configured to receive a plurality of command signals from outside the MCP memory device, the transfer memory chip further configured to output a plurality of control signals to the plurality of memory chips based on the plurality of command signals. Embodiments of the invention also relate to a method of controlling an internal voltage of the MCP memory device.
REFERENCES:
patent: 2007/0271409 (2007-11-01), Miura et al.
patent: 2006156814 (2006-06-01), None
patent: 2006286048 (2006-10-01), None
patent: 1020050004480 (2005-01-01), None
patent: 1020070038586 (2007-04-01), None
Chung Hoe-ju
Lee Jung-bae
Park Moon-sook
Le Thong Q
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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