Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2008-08-07
2010-06-22
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S591000
Reexamination Certificate
active
07741202
ABSTRACT:
A method for controlling interface layer thickness in high dielectric constant (high-k) film structures found in semiconductor devices. According to one embodiment, the method includes providing a monocrystalline silicon substrate, growing a chemical oxide layer on the monocrystalline silicon substrate in an aqueous bath, vacuum annealing the chemical oxide layer, depositing a high-k film on the vacuum annealed chemical oxide layer, and optionally vacuum annealing the high-k film. According to another embodiment, the method includes depositing a high-k film on a chemical oxide layer, and vacuum annealing the high-k film.
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Brewster William M.
Tokyo Electron Limited
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