Patent
1992-05-22
1994-10-04
Shaw, Dale M.
395166, G11C 1100
Patent
active
053534050
ABSTRACT:
A method of controlling an image memory system wherein non-interlace image data is written into the odd field and the even field memories, and the contents written into the odd field and even field memories are respectively read out so as to be converted into interlace image data. Each line of the non-interlace image data is alternately written into the odd field and even field memories in units of a plurality of dots. If the plurality of dots include dots for the odd field and dots for the even field, the image data of the plurality of dots are simultaneously written into both the odd field memory and the even field memory. When reading the image data out from the odd field memory, the image data for the even field written into the odd field memory is invalidated. Similarly, when reading the image data out from the even field memory, the image data for the odd field written into the even field memory is invalidated. With this structure, writing/reading operation to the image memory can be performed at high speed without error even when the total number of dots on one line are not divisible by the number of dots to be written into the memories in parallel. Further, it is not necessary to change the output specification of the output device which outputs the image data, such as a computer.
REFERENCES:
patent: 3832487 (1974-08-01), de Niet
patent: 3947826 (1976-03-01), Bockwoldt
patent: 4386367 (1983-05-01), Peterson
Abe Hitoshi
Doi Kiyotaka
Hirota Tamotsu
Masuyama Kanji
Tajima Katsutoshi
Chauhan U.
Hitachi , Ltd.
Hitachi Computer Electronics Co., Ltd.
Hitachi Video & Information System, Inc.
Shaw Dale M.
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