Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-07-25
2006-07-25
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
Reexamination Certificate
active
07082507
ABSTRACT:
A method of controlling access to an address translation data structure of a computer system. The computer system includes a processor having a normal execution mode and a secure execution mode. The method includes executing code and generating a linear address. During translation of the linear address into a physical address, the method also includes generating a read-only page fault exception during the normal execution mode in response to detecting a software invoked write access to an address translation data structure having a read/write attribute set to be read-only. The method further includes selectively generating either the read-only page fault exception or a security exception during the secure execution mode in response to detecting the software invoked write access.
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Christie David S.
McGrath Kevin J.
Strongin Geoffrey S.
Advanced Micro Devices , Inc.
Curran Stephen J.
Ellis Kevin L.
Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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