Method of controlling a memory device having a memory core

Details Method of controlling a memory device having a memory core Method of controlling a memory device having a memory core

2007-10-23

2007-10-23

Neurauter, Jr., George C. (Department: 2143)

Electrical computers and digital data processing systems: input/

Intrasystem connection

C710S107000

Reexamination Certificate

active

10966767

ABSTRACT:
Method embodiments including providing control information to a memory device is provided. The control information includes a first code which specifies that a write operation be initiated in the memory device. A signal is provided that indicates when the memory device is to begin sampling write data that is stored in the memory core during the write operation. A first bit of the write data is provided to the memory device during an even phase of a clock signal. A second bit of the write data is provided to the memory device during an odd phase of the clock signal.

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English Translation of Notice of the Reason for Refusal, Patent Application No. JP500879/95, Sep. 21, 2004.

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