Fishing – trapping – and vermin destroying
Patent
1990-04-06
1990-12-04
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 41, 437 30, 437 29, 437233, 148DIG122, H01L 21263, H01L 21205
Patent
active
049753851
ABSTRACT:
An improved method is disclosed for forming one or more N- LDD regions in an integrated circuit structure wherein there is no offset between the gate electrode and the source and drain regions in the resulting structure which comprises the steps of: forming a polysilicon gate electrode over a semiconductor wafer substrate, N- doping the substrate to form one or more N- LDD regions, selectively depositing polysilicon on the polysilicon sidewalls of the gate electrode, and then N+ doping the substrate to form N+ source and drain regions in the substrate using the selectively deposited polysilicon as a mask over the N- LDD regions previously formed in the substrate.
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Beinglass Israel
Borland John
Applied Materials Inc.
Chaudhuri Olik
Hickman Paul L.
Taylor John P.
Wilczewski M.
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