Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Patent
1995-05-16
1997-03-18
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
257723, H01L 2348, H01L 2352, H01L 2340
Patent
active
056125755
ABSTRACT:
The chip is fixed to a substrate by its lower face. At least one wire-bonding adaptor in the form of a board is used, the upper face of which has first bonding pads along at least one first edge and second bonding pads along at least one second edge, and including electrical connections between the first and second bonding pads. The wire-bonding adaptor is adhesively bonded by its lower face to the upper face of the chip so that the said first edge is adjacent to a row of output pads located elsewhere than on the periphery of the upper face of the chip and so that the said second edge is adjacent to the periphery of the chip. Bonding wires are bonded, on the one hand, between the output pads of the said row and the first bonding pads and, on the other hand, between the second bonding pads and conducting pads on the substrate.
REFERENCES:
patent: 4755866 (1988-05-01), Marshall et al.
patent: 5126286 (1992-06-01), Chance
patent: 5250840 (1993-10-01), Oh et al.
patent: 5384487 (1995-01-01), Kostoker et al.
patent: 5384488 (1995-01-01), Golsham et al.
Patent Abstract of Japan--vol. 17, n.degree. 213, Apr. 26, 1993, JP-A-4 350 961 (Hitachi Ltd).
Clark S. V.
Matra Marconi Space France
Saadat Mahshid
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