Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1993-09-17
1995-10-03
Snow, Walter E.
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
327147, 327156, 327233, 327234, 326 94, H04L 700, H03K 513
Patent
active
054558409
ABSTRACT:
A method of compensating a phase of a system clock for use in a system clock circuit for receiving an external clock to produce a system clock for an information processing system, in which the quantity of phase variation of the external clock supplied from a reference clock oscillator provided outside the system is detected; in accordance with the detected quantity of phase variation, the phase variation of the external clock supplied from the reference clock generator is compensated to supply the compensated external clock to the system clock circuit; whether or not a state of the external clock supplied from the reference clock oscillator provided outside the system is abnormal is detected; and in accordance with the detected state of the external clock, one of the external clock supplied from the reference clock oscillator and the compensated external clock is selected to supply the selected external clock to the system clock.
REFERENCES:
patent: 5194828 (1993-03-01), Kato
patent: 5297869 (1994-03-01), Benham
Hirai Masato
Nakauchi Toshihiko
Hitachi , Ltd.
Ning John
Snow Walter E.
LandOfFree
Method of compensating a phase of a system clock in an informati does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of compensating a phase of a system clock in an informati, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of compensating a phase of a system clock in an informati will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1082129