Method of compensating a phase of a system clock in an informati

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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327147, 327156, 327233, 327234, 326 94, H04L 700, H03K 513

Patent

active

054558409

ABSTRACT:
A method of compensating a phase of a system clock for use in a system clock circuit for receiving an external clock to produce a system clock for an information processing system, in which the quantity of phase variation of the external clock supplied from a reference clock oscillator provided outside the system is detected; in accordance with the detected quantity of phase variation, the phase variation of the external clock supplied from the reference clock generator is compensated to supply the compensated external clock to the system clock circuit; whether or not a state of the external clock supplied from the reference clock oscillator provided outside the system is abnormal is detected; and in accordance with the detected state of the external clock, one of the external clock supplied from the reference clock oscillator and the compensated external clock is selected to supply the selected external clock to the system clock.

REFERENCES:
patent: 5194828 (1993-03-01), Kato
patent: 5297869 (1994-03-01), Benham

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