Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-08-31
2003-11-25
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S706000, C438S712000, C438S719000
Reexamination Certificate
active
06653227
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming a high quality cobalt silicide film in the fabrication of integrated circuits.
(2) Description of the Prior Art
Cobalt disilicide (CoSi
2
) is a preferred salicide technology as CMOS device sizes shrink to 0.18 &mgr;m and beyond because of its good performance with small polysilicon and active area line widths. One of the main pursuits in Co silicidation is to obtain a CoSi
2
film with high quality to meet the requirement of low junction leakage. As transistor size is further scaled down, this requirement will become more stringent. Hence, new approaches need to be explored towards this purpose. It has been reported that an interlayer of thin silicon oxide between the cobalt and the silicon substrate plus a titanium cap layer can form a diffusion membrane between the Co film and the silicon, thereby enhancing an epitaxial growth of CoSi
2
film and therefore, elevating CoSi
2
film quality.
U.S. Pat. No. 6,037,254 to Hong discloses a silicon oxide layer underlying the cobalt layer, as discussed above. U.S. Pat. No. 5,710,438 to Oda et al teaches an ion implant into cobalt before annealing to remove the native oxide film underlying the cobalt layer. U.S. Pat. No. 6,022,457 to Huang et al discloses cleaning the native oxide layer off the silicon substrate, then depositing a titanium layer under the cobalt layer. A silicon layer may be deposited over the titanium layer and under the cobalt layer. U.S. Pat. No. 5,736,461 to Berti et al teaches a titanium nitride or titanium tungsten capping layer over the cobalt. U.S. Pat. No. 6,004,879 to Hu et al discloses sputtering CoSi
x
O
y
in order to form cobalt silicide.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an effective and very manufacturable method of fabricating a cobalt disilicide film in the fabrication of an integrated circuit.
A further object of the invention is to provide a method of fabricating a high quality cobalt disilicide film in the fabrication of an integrated circuit.
Yet another object is to provide a method of forming a high quality cobalt disilicide film by using an oxide-titanium underlayer.
Yet another object is to provide a method of forming a high quality cobalt disilicide film by using an oxide-titanium underlayer and a titanium nitride capping layer.
In accordance with the objects of the invention a method for forming a high quality cobalt disilicide film in the fabrication of an integrated circuit is achieved. A semiconductor substrate is provided having silicon regions to be silicided. A thermal oxide layer is grown overlying the semiconductor substrate. A titanium layer is deposited overlying the thermal oxide layer. A cobalt layer is deposited overlying the titanium layer. A titanium nitride capping layer is deposited over the cobalt layer. The substrate is subjected to a first rapid thermal anneal whereby the cobalt is transformed to cobalt monosilicide where it overlies the silicon regions and wherein the cobalt not overlying the silicon regions is unreacted. The unreacted cobalt layer and the capping layer are removed. The substrate is subjected to a second rapid thermal anneal whereby the cobalt monosilicide is transformed to cobalt disilicide to complete formation of a cobalt disilicide film in the manufacture of an integrated circuit.
REFERENCES:
patent: 5047367 (1991-09-01), Wei et al.
patent: 5736461 (1998-04-01), Berti et al.
patent: 5950098 (1999-09-01), Oda et al.
patent: 5970370 (1999-10-01), Besser et al.
patent: 5989988 (1999-11-01), Iinuma et al.
patent: 6004879 (1999-12-01), Hu et al.
patent: 6022457 (2000-02-01), Huang et al.
patent: 6037254 (2000-03-01), Hong
patent: 6238986 (2001-05-01), Kepler et al.
patent: 6281102 (2001-08-01), Cao et al.
patent: 6300239 (2001-10-01), Ono
Wolf et al.; Silicon Processing for the VLSI Era; 1986; vol. 1; p. 198-241.
Ang Arthur
Lai Chung Woh
Lim Eng Hua
Lin Charles
Peng Hai Jiang
Chartered Semiconductor Manufacturing Ltd.
Deo Duy-Vu
Pike Rosemary L. S.
Utech Benjamin L.
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